Design Verification (DV) Engineer 300 台灣新竹市科學園區創新三路六號6樓
申請

NEUCHIPS cooperation strives to be one of the leading AI accelerator companies in the world. We provide high efficiency AI accelerator solutions for audio, video, and recommendation. We are looking for people who can help and grow with our team. NEUCHIPS's software team is seeking world-class system software engineers who will work on cooperating NEUCHIPS AI accelerator solutions.

The ideal candidate of Design Verification (DV) Engineer is self-motivated, multi-tasker, and demonstrated team-player.

Minimum qualifications

  • Familiarity with SystemVerilog and UVM
  • Familiarity with AMBA protocol
  • Experience in VIP usage
  • MS/Ph.D., Electrical Engineering or Computer Science
  • A minimum of 3 years of DV experience

Responsibilities

  • Verify on-chip interconnection such as AXI interface
  • Verify in-house AI accelerator design
 

Neuchips is proud to be an happy and equal opportunity workplace. We are committed to equal emplyment opportunity regardless of race, national origin, age, gender identity or veteran status.

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